Design of Wide-range All Digital Clock and Data Recovery Circuit
نویسندگان
چکیده
منابع مشابه
Low Jitter and Wide Band frequency Clock Recovery Circuit
Clock recovery circuits are used in data communication systems for the system synchronization. In general a PLL (Phase Locked Loop) circuit is used to extract the clock signal from the input data stream. The recovered clock signal is always jittered and have to be adjusted by using a dejitter circuit. Tracking these errors over an extended period of time determines the system stability. Sources...
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We present and evaluate a compact, all-optical Clock and Data Recovery (CDR) circuit based on integrated Mach Zehnder interferometric switches. Successful operation for short packet-mode traffic of variable length and phase alignment is demonstrated. The acquired clock signal rises within 2 bits and decays within 15 bits, irrespective of packet length and phase. Error-free operation is demonstr...
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ژورنال
عنوان ژورنال: The Transactions of The Korean Institute of Electrical Engineers
سال: 2012
ISSN: 1975-8359
DOI: 10.5370/kiee.2012.61.11.1695